ASIC Physical design

Monday, 27 August 2012

Product binning

Product binning can be done based on many operational parameters like voltage, freq., disabling some IPs, operating temperature, etc. Purpose is to increase the yield. Below link gives some basic idea about product binning:

http://en.wikipedia.org/wiki/Product_binning

http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6212859&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D6212859
Posted by nayan navadiya at 22:57
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Blog Archive

  • ▼  2012 (20)
    • ▼  August (20)
      • ASIC PD interview questions
      • ASIC Design Flow
      • I/P & O/P of ASIC flow
      • Fix transition time violations
      • Electrical Rule Check
      • Antenna
      • Static Timing Analysis
      • Clock Tree Synthesis
      • Electromigration
      • Crosstalk
      • Latch up violation
      • Special Cells
      • Low Power design
      • Advanced OCV
      • Timing Optimization Techniques
      • Logic Synthesis
      • Product binning
      • SSTA
      • double patterning
      • EUV

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